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? semiconductor components industries, llc, 2012 september, 2012 ? rev. 6 1 publication order number: mc10ep08/d mc10ep08, mc100ep08 3.3v / 5v?ecl 2-input differential xor/xnor description the mc10/100ep08 is a dif ferential xor/xnor gate. the ep08 is ideal for applications requiring the fastest ac performance available. the 100 series contains temperature compensation. features ? 250 ps typical propagation delay ? maximum frequency > 3 ghz typical ? pecl mode operating range: v cc = 3.0 v to 5.5 v with v ee = 0 v ? necl mode operating range: v cc = 0 v with v ee = ? 3.0 v to ? 5.5 v ? open input default state ? safety clamp on inputs ? q output will default low with inputs open or at v ee ? these are pb ? free devices a = assembly location l = wafer lot y = year w = work week = pb ? free package h = mc10 k = mc100 5j = mc10 2y = mc100 d = date code soic ? 8 d suffix case 751 marking diagrams* tssop ? 8 dt suffix case 948r hp08 alyw kp082 alyw 1 8 1 8 1 8 http://onsemi.com *for additional marking information, refer to application note and8002/d. see detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. ordering information 1 8 hep08 alyw 1 8 kep08 alyw 1 8 dfn8 mn suffix case 506aa 5j d 1 4 2y d 1 4 (note: microdot may be in either location)
mc10ep08, mc100ep08 http://onsemi.com 2 1 2 3 45 6 7 8 q v ee v cc figure 1. 8 ? lead pinout (top view) and logic diagram d0 q d1 d1 d0 table 1. pin description pin d0, d1, d0 , d1 q, q ecl data outputs function ecl data inputs d0* d1* d0 ** d1 ** q q llhhlh lhhlhl hllhhl hhll lh table 2. truth table v cc v ee positive supply negative supply * pins will default low when left open. ** pins will default to 0.666% of v cc when left open. ep (dfn8 only) thermal exposed pad must be connected to a sufficient thermal conduit. electrically connect to the most negative supply (gnd) or leave unconnected, floating open. table 3. attributes characteristics value internal input pulldown resistor 75 k internal input pullup resistor 37.5 k esd protection human body model machine model charged device model > 4 kv > 200 v > 2 kv moisture sensitivity, indefinite time out of drypack (note 1) pb pkg pb ? free pkg soic ? 8 tssop ? 8 dfn8 level 1 level 1 level 1 level 1 level 3 level 1 flammability rating oxygen index: 28 to 34 ul 94 v ? 0 @ 0.125 in transistor count 135 devices meets or exceeds jedec spec eia/jesd78 ic latchup test 1. for additional information, see application note and8003/d.
mc10ep08, mc100ep08 http://onsemi.com 3 table 4. maximum ratings symbol parameter condition 1 condition 2 rating unit v cc pecl mode power supply v ee = 0 v 6 v v ee necl mode power supply v cc = 0 v ? 6 v v i pecl mode input voltage necl mode input voltage v ee = 0 v v cc = 0 v v i v cc v i v ee 6 ? 6 v v i out output current continuous surge 50 100 ma ma t a operating temperature range ? 40 to +85 c t stg storage temperature range ? 65 to +150 c ja thermal resistance (junction ? to ? ambient) 0 lfpm 500 lfpm soic ? 8 soic ? 8 190 130 c/w c/w jc thermal resistance (junction ? to ? case) standard board soic ? 8 41 to 44 c/w ja thermal resistance (junction ? to ? ambient) 0 lfpm 500 lfpm tssop ? 8 tssop ? 8 185 140 c/w c/w jc thermal resistance (junction ? to ? case) standard board tssop ? 8 41 to 44 c/w ja thermal resistance (junction ? to ? ambient) 0 lfpm 500 lfpm dfn8 dfn8 129 84 c/w c/w t sol wave solder pb ? free <2 to 3 sec @ 260 c 265 c jc thermal resistance (junction ? to ? case) (note 2) dfn8 35 to 40 c/w stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 2. jedec standard multilayer board ? 2s2p (2 signal, 2 power) table 5. 10ep dc characteristics, pecl v cc = 3.3 v, v ee = 0 v (note 3) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 20 28 36 20 30 38 20 32 38 ma v oh output high voltage (note 4) 2165 2290 2415 2230 2355 2480 2290 2415 2540 mv v ol output low voltage (note 4) 1365 1490 1615 1430 1555 1680 1490 1615 1740 mv v ih input high voltage (single ? ended) 2090 2415 2155 2480 2215 2540 mv v il input low voltage (single ? ended) 1365 1690 1430 1755 1490 1815 mv v ihcmr input high voltage common mode range (differential configuration) (note 5) 2.0 3.3 2.0 3.3 2.0 3.3 v i ih input high current 150 150 150 a i il input low current d d 0.5 ? 150 0.5 ? 150 0.5 ? 150 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 3. input and output parameters vary 1:1 with v cc . v ee can vary +0.3 v to ? 2.2 v. 4. all loading with 50 to v cc ? 2.0 v. 5. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal.
mc10ep08, mc100ep08 http://onsemi.com 4 table 6. 10ep dc characteristics, pecl v cc = 5.0 v, v ee = 0 v (note 6) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 20 28 36 20 30 38 20 32 38 ma v oh output high voltage (note 7) 3865 3940 4115 3930 4055 4180 3990 4115 4240 mv v ol output low voltage (note 7) 3065 3190 3315 3130 3255 3380 3190 3315 3440 mv v ih input high voltage (single ? ended) 3790 4115 3855 4180 3915 4240 mv v il input low voltage (single ? ended) 3065 3390 3130 3455 3190 3515 mv v ihcmr input high voltage common mode range (differential configuration) (note 8) 2.0 5.0 2.0 5.0 2.0 5.0 v i ih input high current 150 150 150 a i il input low current d d 0.5 ? 150 0.5 ? 150 0.5 ? 150 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 6. input and output parameters vary 1:1 with v cc . v ee can vary +2.0 v to ? 0.5 v. 7. all loading with 50 to v cc ? 2.0 v. 8. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal. table 7. 10ep dc characteristics, necl v cc = 0 v; v ee = ? 5.5 v to ? 3.0 v (note 9) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 20 28 36 20 30 38 20 32 38 ma voh output high voltage (note 10) ? 1135 ? 1010 ? 885 ? 1070 ? 945 ? 820 ? 1010 ? 885 ? 760 mv v ol output low voltage (note 10) ? 1935 ? 1810 ? 1685 ? 1870 ? 1745 ? 1620 ? 1810 ? 1685 ? 1560 mv v ih input high voltage (single ? ended) ? 1210 ? 885 ? 1145 ? 820 ? 1085 ? 760 mv v il input low voltage (single ? ended) ? 1935 ? 1610 ? 1870 ? 1545 ? 1810 ? 1485 mv v ihcmr input high voltage common mode range (differential configuration) (note 11) v ee + 2.0 0.0 v ee + 2.0 0.0 v ee + 2.0 0.0 v i ih input high current 150 150 150 a i il input low current d d 0.5 ? 150 0.5 ? 150 0.5 ? 150 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 9. input and output parameters vary 1:1 with v cc . 10. all loading with 50 to v cc ? 2.0 v. 11. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal.
mc10ep08, mc100ep08 http://onsemi.com 5 table 8. 100ep dc characteristics, pecl v cc = 3.3 v, v ee = 0 v (note 12) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 20 28 36 20 30 38 20 32 40 ma v oh output high voltage (note 13) 2155 2280 2405 2155 2280 2405 2155 2280 2405 mv v ol output low voltage (note 13) 1355 1480 1605 1355 1480 1605 1355 1480 1605 mv v ih input high voltage (single ? ended) 2075 2420 2075 2420 2075 2420 mv v il input low voltage (single ? ended) 1355 1675 1355 1675 1355 1675 mv v ihcmr input high voltage common mode range (differential configuration) (note 14) 2.0 3.3 2.0 3.3 2.0 3.3 v i ih input high current 150 150 150 a i il put low current d d 0.5 ? 150 0.5 ? 150 0.5 ? 150 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 12. input and output parameters vary 1:1 with v cc . v ee can vary +0.3 v to ? 2.2 v. 13. all loading with 50 to v cc ? 2.0 v. 14. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal. table 9. 100ep dc characteristics, pecl v cc = 5.0 v, v ee = 0 v (note 15) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 20 28 36 20 30 38 20 32 40 ma v oh output high voltage (note 16) 3855 3980 4105 3855 3980 4105 3855 3980 4105 mv v ol output low voltage (note 16) 3055 3180 3305 3055 3180 3305 3055 3180 3305 mv v ih input high voltage (single ? ended) 3775 4120 3775 4120 3775 4120 mv v il input low voltage (single ? ended) 3055 3375 3055 3375 3055 3375 mv v ihcmr input high voltage common mode range (differential configuration) (note 17) 2.0 5.0 2.0 5.0 2.0 5.0 v i ih input high current 150 150 150 a i il input low current d d 0.5 ? 150 0.5 ? 150 0.5 ? 150 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 15. input and output parameters vary 1:1 with v cc . v ee can vary +2.0 v to ? 0.5 v. 16. all loading with 50 to v cc ? 2.0 v. 17. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal.
mc10ep08, mc100ep08 http://onsemi.com 6 table 10. 100ep dc characteristics, necl v cc = 0 v; v ee = ? 5.5 v to ? 3.0 v (note 18) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 20 28 36 20 30 38 20 32 40 ma v oh output high voltage (note 19) ? 1145 ? 1020 ? 895 ? 1145 ? 1020 ? 895 ? 1145 ? 1020 ? 895 mv v ol output low voltage (note 19) ? 1945 ? 1820 ? 1695 ? 1945 ? 1820 ? 1695 ? 1945 ? 1820 ? 1695 mv v ih input high voltage (single ? ended) ? 1225 ? 880 ? 1225 ? 880 ? 1225 ? 880 mv v il input low voltage (single ? ended) ? 1945 ? 1625 ? 1945 ? 1625 ? 1945 ? 1625 mv v ihcmr input high voltage common mode range (differential configuration) (note 20) v ee + 2.0 0.0 v ee + 2.0 0.0 v ee + 2.0 0.0 v i ih input high current 150 150 150 a i il input low current d d 0.5 ? 150 0.5 ? 150 0.5 ? 150 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 18. input and output parameters vary 1:1 with v cc . 19. all loading with 50 to v cc ? 2.0 v. 20. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal. table 11. ac characteristics v cc = 0 v; v ee = ? 3.0 v to ? 5.5 v or v cc = 3.0 v to 5.5 v; v ee = 0 v (note 21) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit f max maximum frequency (figure 2) > 3 > 3 > 3 ghz t plh , t phl propagation delay to output differential d, d to q, q 170 220 280 180 250 300 200 270 320 ps t jitter cycle ? to ? cycle jitter (figure 2) 0.2 < 1 0.2 < 1 0.2 < 1 ps v pp input voltage swing (differential configuration) 150 800 1200 150 800 1200 150 800 1200 mv t r t f output rise/fall times q, q (20% ? 80%) 70 120 170 80 130 180 100 150 200 ps note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 21. measured using a 750 mv source, 50% duty cycle clock source. all loading with 50 to v cc ? 2.0 v.
mc10ep08, mc100ep08 http://onsemi.com 7 0 100 200 300 400 500 600 700 800 900 0 1000 2000 3000 4000 5000 6000 figure 2. f max /jitter frequency (mhz) 1 2 3 4 5 6 7 8 (jitter) figure 3. typical termination for output driver and device evaluation (see application note and8020/d ? termination of ecl logic devices.) driver device receiver device qd q d z o = 50 z o = 50 50 50 v tt v tt = v cc ? 2.0 v
mc10ep08, mc100ep08 http://onsemi.com 8 ordering information device package shipping ? mc10ep08dg soic ? 8 (pb ? free) 98 units / rail mc10ep08dr2g soic ? 8 (pb ? free) 2500 / tape & reel mc10ep08dtg tssop ? 8 (pb ? free) 100 units / rail mc10ep08dtr2g tssop ? 8 (pb ? free) 2500 / tape & reel mc10ep08mnr4g (contact sales office for availability) dfn8 (pb ? free) 1000 / tape & reel mc100ep08dg soic ? 8 (pb ? free) 98 units / rail mc100ep08dr2g soic ? 8 (pb ? free) 2500 / tape & reel mc100ep08dtg tssop ? 8 (pb ? free) 100 units / rail mc100ep08dtr2g tssop ? 8 (pb ? free) 2500 / tape & reel mc100ep08mnr4g (contact sales office for availability) dfn8 (pb ? free) 1000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. resource reference of application notes an1405/d ? ecl clock distribution techniques an1406/d ? designing with pecl (ecl at +5.0 v) an1503/d ? eclinps i/o spice modeling kit an1504/d ? metastability and the eclinps family an1568/d ? interfacing between lvds and ecl an1642/d ? the ecl translator guide and8001/d ? odd number counters design and8002/d ? marking and date codes and8020/d ? termination of ecl logic devices and8066/d ? interfacing with eclinps and8090/d ? ac characteristics of ecl devices
mc10ep08, mc100ep08 http://onsemi.com 9 package dimensions dfn8 case 506aa issue e ?? ?? ?? a d e b c 0.10 pin one 2x reference 2x top view side view bottom view a l (a3) d2 e2 c c 0.10 c 0.10 c 0.08 note 4 a1 seating plane e/2 e 8x k note 3 b 8x 0.10 c 0.05 c a b b dim min max millimeters a 0.80 1.00 a1 0.00 0.05 a3 0.20 ref b 0.20 0.30 d 2.00 bsc d2 1.10 1.30 e 2.00 bsc e2 0.70 0.90 e 0.50 bsc k l 0.25 0.35 1 4 8 5 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 2.30 0.50 0.50 8x dimensions: millimeters 0.30 pitch 8x 1 package outline recommended l1 detail a l optional constructions l ??? 0.10 0.30 ref 0.90 1.30
mc10ep08, mc100ep08 http://onsemi.com 10 package dimensions soic ? 8 nb case 751 ? 07 issue ak seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint*
mc10ep08, mc100ep08 http://onsemi.com 11 package dimensions dim min max min max inches millimeters a 2.90 3.10 0.114 0.122 b 2.90 3.10 0.114 0.122 c 0.80 1.10 0.031 0.043 d 0.05 0.15 0.002 0.006 f 0.40 0.70 0.016 0.028 g 0.65 bsc 0.026 bsc l 4.90 bsc 0.193 bsc m 0 6 0 6 seating plane pin 1 1 4 85 detail e b c d a g detail e f m l 2x l/2 ? u ? s u 0.15 (0.006) t s u 0.15 (0.006) t s u m 0.10 (0.004) v s t 0.10 (0.004) ? t ? ? v ? ? w ? 0.25 (0.010) 8x ref k ident k 0.25 0.40 0.010 0.016 tssop ? 8 dt suffix case 948r ? 02 issue a notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash. protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. terminal numbers are shown for reference only. 6. dimension a and b are to be determined at datum plane -w-. on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parame ters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 mc10ep08/d eclinps is a trademark of semiconductor components industries, llc (scillc). literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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